1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to diodes and methods of making the same.
2. Description of the Related Art
Heat management plays a vital role in the process of designing most electrical devices. However, the microscopic geometries and tight electrical performance windows of integrated circuits present special challenges. Elevated chip operating temperatures impose constraints on the performance of the circuit in several ways. Chip operating temperature has a direct impact on the maximum available clocking speed and thus the overall speed performance of the integrated circuit. Furthermore, higher operating temperatures restrict the permissible operating voltage and ambient temperature environment of the chip. Lastly, chip life span is adversely impacted by higher operating temperatures. If the available mechanisms for integrated circuit heat dissipation cannot adequately handle the I2R heat propagation, compromises in the speed performance, the operating voltage, the applications and the design life span of the integrated circuit may have to be made.
A common method for monitoring chip temperature involves the use of an on-chip diode in conjunction with the remote diode temperature sensor. A conventional on-chip thermal diode consists of a forward biased pn junction. A conventional method of using this type of on-chip diode entails forcing two different currents through the diode, typically with a current ratio of about 10:1. The diode's voltage is measured at each current level and the temperature is calculated based on a diode equation as follows:                                           V            H                    -                      V            L                          =                  n          ⁢                      kT            q                    ⁢                      (                          ln              ⁢                                                I                  H                                                  I                  L                                                      )                                              Equation        ⁢                                  ⁢        1            where IH is the larger diode bias current, IL is the smaller diode bias current, VH is the diode voltage while IH is flowing, VL is the diode voltage while IL is flowing, n is the ideality factor of the diode, k is Boltzmann's constant (1.38×10−23 joules/K), T is the temperature in Kelvins and q is the charge of an electron (1.60×10−19 C). If IH/IL is selected to be 10.0, Equation 1 simplifies to:VH−VL=1.986×10−4·nT  equation 2Equation #2 may then be solved for the temperature T.
The accuracy of the temperature reading from the on-chip diode depends on the ideality n as well as the series resistance of the diode. The ideality factor n of the diode is a function of, inter alia, the character of the pn junction and the quality, that is, the defect level of the semiconductor body in which the pn junction is positioned. The series resistance is largely a factor of the resistance of the diode body, that is, the resistance of the semiconductor body between the pn junction and the grounded n-doped impurity region. In bulk silicon processing where vertical device isolation is provide by impurity wells, the pn junction is not bounded vertically and thus has both substantial vertical and horizontal components. Ideality factors approaching 1.0 can be readily achieved. In addition, in a bulk silicon device, the depth of the silicon body is such that the resistance thereof is relatively low such that errors introduced due to series resistance may be managed.
More recently introduced integrated circuits have been implemented on semiconductor-on-insulator substrates, which consist of a very thin silicon layer positioned on an underlying insulator. Active regions are circumscribed by trench isolation structures. The migration to semiconductor-on-insulator technology has introduced a set of challenges associated with implementing thermal on-chip diodes. To begin with, the island-like silicon active regions are relatively thin and thus have an inherently higher resistance than would be observed in a bulk silicon process. The higher series resistances can adversely affect the accuracy of the temperature readings from the diode. In addition, the pn junction that makes up the diode in a semiconductor-on-insulator substrate is often constrained vertically by the underlying insulator layer. Thus, the pn junction may consist primarily of a vertical component. If there are defects in the semiconductor layer, those defects combine with the much smaller size of the pn junction can lead to a higher than desired ideality factor.
One conventional on-chip diode design for silicon-on-insulator processing utilizes a ring-shaped gate electrode positioned on a silicon island. The gate electrode is rectangularly shaped with two long sides and two short sides. A rectangular-shaped p-type impurity region is positioned in the silicon island beneath and somewhat concentric with the gate. A ring-shaped n-type impurity region is positioned beneath and somewhat concentric with the gate. The rectangular-shaped p-type impurity region and the ring-shaped n-type region define a ring-shaped pn junction that positioned beneath but slightly offset from the footprint of the gate. The perimeter of the ring-shaped gate is circumscribed by two dielectric sidewall spacers. The two spacers are symmetrically positioned and shaped around the periphery of the gate.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.